Efficient dual metal contact formation for a semiconductor device

ABSTRACT

A method of forming contacts to an n-type layer and a p-type layer of a semiconductor device includes depositing a dielectric layer on the n-type layer and the p-type layer. A pattern is formed in the dielectric layer, the pattern having a plurality of metal contact patterns for the semiconductor device. A first metal layer is deposited into the plurality of metal contact patterns, and a second metal layer is deposited directly on the first metal layer. External contacts for the semiconductor device are formed, where the external contacts include the second metal layer.

RELATED APPLICATIONS

This application is a divisional of U.S. patent application Ser. No.14/730,500, filed on Jun. 4, 2015 and entitled “Efficient Dual MetalContact Formation for a Semiconductor Device,” which is herebyincorporated by reference for all purposes.

BACKGROUND OF THE INVENTION

Metallization processes in semiconductor device manufacturing provideelectrical contact points for a semiconductor device. Metallizationprocesses represent a nontrivial materials engineering challenge in thatthe physical contact between the semiconductor material and themetallization can drastically affect the performance of the contact. Inaddition, certain metals are not compatible with additional processingsteps that must be conducted after the metallization process has beenconducted. Patterning the metal is also challenging, and multiple stepsare required to form the metallization contacts. For example, theformation of the metallization contacts is often performed using a metallift-off technique, which involves various process steps to apply aphotoresist, pattern the photoresist, deposit the metal, and strip thesacrificial material and extraneous target material.

SUMMARY

A method of forming contacts to an n-type layer and a p-type layer of asemiconductor device includes depositing a dielectric layer on then-type layer and the p-type layer. A pattern is formed in the dielectriclayer, the pattern having a plurality of metal contact patterns for thesemiconductor device. A first metal layer is deposited into theplurality of metal contact patterns, and a second metal layer isdeposited directly on the first metal layer. External contacts for thesemiconductor device are formed, where the external contacts include thesecond metal layer.

BRIEF DESCRIPTION OF DRAWINGS

FIGS. 1A-1G show metallization process steps as known in the art.

FIGS. 2A-2F show side cross-sectional views of contacts being formed ina semiconductor device, in some embodiments.

FIG. 3 is an exemplary flowchart representing methods for formingcontacts corresponding to FIGS. 2A-2F.

FIGS. 4A-4F show side cross-sectional views of another embodiment offorming contacts for a semiconductor device.

FIG. 5 is an exemplary flowchart representing methods for formingcontacts corresponding to FIGS. 4A-4F.

DETAILED DESCRIPTION OF THE EMBODIMENTS

Metallization of semiconductor devices, such as in forming contacts forthe device, typically requires multiple processes that can be costly andtime-consuming. For example, in ultra-violet light emitting diodes (UVLED), metallization typically requires two separate steps for formingthe n-contact metal and forming the p-contact metal. A thirdmetallization step may also be required to form a thick metal layer toenable external contacts from a package to the n and p device contacts.Different metal stacks are typically used for the n and p contacts, thusrequiring separate processes to deposit the different metals. Then-contact and p-contact use lift-off processes for creatinglow-resistance Ohmic contacts to the device, whereas the thick metalstep is an etch-based process for facilitation of device packaging. Thusconventionally, the metallization process is divided in up to threedifferent process steps—two lift-off processes and an etch-basedprocess. Furthermore, each of these process steps involves at least onephotolithography step.

In the present disclosure, a process is described for forming then-contact metal, p-contact metal and thick metal layers in the sameprocess step. Performing the full metallization process in a single stepreduces the cost and time required to process semiconductor devices suchas UV LED wafers. The methods include forming the contacts with dualmetal layers, where the two layers of metal are formed in an efficientmanner. Although the embodiments shall be described in terms of an LEDdevice, the methods are applicable to other types of semiconductordevices such as bipolar transistors, and including other opto-electronicdevices such as photodiodes, laser diodes and solar cells.

FIGS. 1A-1G depict a typical metallization process as known in the art.In FIGS. 1A-1B, an LED device 100 includes a substrate 110, a bufferlayer 120, an n-type layer 130, an intrinsic layer 132 and a p-typelayer 134. Substrate 110 may be, for example, silicon, sapphire, siliconcarbide, or a group III-nitride such as aluminum nitride. In anopto-electronic device, intrinsic layer 132, which is between the n-typelayer 130 and p-type layer 134, may also be referred to as a lightgenerating structure of the device 100. LED device 100 also includesn-contacts 140 a and 140 c, and p-contact 140 b, which areconventionally formed by a metal lift-off technique. That is, to formthe n-contacts 140 a and 140 c, lift-off resist 142 and standardphotoresist 144 are first layered onto n-type layer 130 and p-type layer134 of device 100. Lift-off resist 142 and standard photoresist 144 arethen exposed and developed to form patterns for the n-contacts 140 a and140 c. A desired metal for the n-contacts is then deposited, such thatthe metal would consequently be deposited onto the top surface of thestandard photoresist 144 and into the pattern areas that have beenetched away. Next, the lift-off resist 142, standard photoresist 144 andresidual contact metal 140 d—which is on top of standard photoresist 144in the unpatterned areas—are removed as shown in FIG. 1B, leaving theformed n-contacts 140 a and 140 c on the device 100. If different metalsare used for the n and p regions, which is typical in the industry, thelift-off process would then be repeated to form p-contact 140 b in aseparate process step by patterning the p-contact area and thendepositing the desired p-contact metal.

In FIG. 1C, passivation layer 150 is deposited on the top surface ofdevice 100 and patterned, such as by lithography, to form openings overcontacts 140 a, 140 b and 140 c. In FIG. 1D, a thick metal layer 160 isdeposited onto the passivation layer 150 and onto the exposed areas ofcontacts 140 a, 140 b and 140 c. Standard photoresist 170 is depositedonto thick metal 160, and patterned using lithography to serve as aphotoresist etch mask, such as to form the three discrete patterns overcontacts 140 a, 140 b and 140 c as shown in FIG. 1D.

FIG. 1E shows thick metal 160 after etching, such as by a plasma etch,leaving thick metal portions 160 a, 160 b and 160 c over the contacts140 a, 140 b and 140 c. Thick metal 160 serves as a packaging metal, toenable external contacts between a package and the device 100. In FIG.1F, the standard photoresist 170 has been stripped off device 100,exposing the packaging contacts formed by thick metal portions 160 a,160 b and 160 c. In FIG. 1G, passivation layer 180 has been depositedand patterned to provide access to the device contacts formed by 140a/160 a, 140 b/160 b and 140 c/160 c.

As demonstrated by FIGS. 1A-1B, the conventional metallization processof LED device 100, such as a III-nitride LED, uses a lift-off techniqueto deposit contact metal layers on the n and p regions. As describedearlier in this disclosure, a thick metal layer is often needed forelectrically connecting a device to its package. Another aspect ofconventional metallization schemes is that they typically employdifferent metal stacks for the n and p-contacts, which precludesdeposition of the contact and thick metal layers in the same step.

The present disclosure includes a metallization scheme in which both then-contact and p-contact of the device are formed by a first metal layerand a second metal layer. That is, the same metals are used for both then-contact and p-contact, thus simplifying the metallization into onesequential process. In some embodiments, the first metal may be titaniumand the second metal may be aluminum-copper-silicon (AlCuSi). In someembodiments, the methods combine the n-contact metal, p-contact metaland thick metal depositions into a single process step. Use of thesemethods for the n and p contact metals enables a major processsimplification because the n and p contact metals, such as Ti/AlCuSi,can be deposited at the same time. Additionally, deposition of the thickmetal layer, such as AlCuSi, can be performed as a continuation of thecontact metal in a single process step. Experimentation performed inrelation to this disclosure has successfully applied a Ti/AlCuSimetallization scheme for both n and p contacts of III-nitride LEDs, asan example of an application of these methods.

FIGS. 2A-2F show an embodiment of forming contacts using methods of thepresent disclosure. FIG. 2A shows a semiconductor device 200 thatincludes a substrate 210, a buffer layer 220, an n-type layer 230, anintrinsic layer 232 and a p-type layer 234. Substrate 210 may be, forexample, silicon, sapphire, silicon carbide or a group III-nitride suchas aluminum nitride. A dielectric layer 245, such as silicon dioxide(SiO₂), is deposited on the n-type layer 230 and p-type layer 234.

In FIG. 2B, a plurality of metal contact patterns 246 a, 246 b, and 246c are formed in layer 245. In some embodiments, metal contact patterns246 a, 246 b, and 246 c include an n-contact and a p-contact for anopto-electronic device. The contact patterns 246 a, 246 b, and 246 c maybe formed, for example, by a photoresist mask 250 which is deposited asa layer over dielectric layer 245 and then patterned using a wetchemical or a plasma etch. In the embodiment of FIG. 2B, the dielectriclayer covers side walls—that is, the vertical portions 245 a and 245 bof the opto-electronic device structure. In FIG. 2C, photoresist mask250 has been removed, and a first metal layer 260 has been depositedinto the metal contact patterns 246 a, 246 b, and 246 c and ontodielectric layer 245. In some embodiments, the first metal layer 260 isdeposited directly into the metal contact patterns 246 a, 246 b, and 246c (FIG. 2B), which are p-contact and n-contact patterns. Also in FIG.2C, a second metal layer 270 is deposited directly on the first metallayer 260. In some embodiments, both first metal layer 260 and secondmetal layer 270 function as a contact metal for the semiconductor device200. Second metal layer 270 additionally may serve as a packaging metal.In some embodiments, first metal layer 260 may be, for example, titanium(Ti) having a thickness of up to 100 nm, such as approximately 25 nm. Invarious embodiments, the second metal layer 270 may be pure Al, AlCu,AlSi, or AlCuSi. In some embodiments, the first metal layer 260 istitanium and the second metal layer 270 is AlCuSi. The second metallayer 270 may have a thickness of, for example, at least 300 nm, such asat least 800 nm in some embodiments, such as approximately 1 micron incertain embodiments. In some embodiments, the first metal layer 260 isat least 99.0% pure titanium. In some embodiments, the first metal layer260 is titanium of at least 99.0% purity, and the second metal layer isa composition comprising 0-10% copper, 0-5% silicon, and up to 100%aluminum. For example, in one embodiment the second metal may be AlCuSideposited from an aluminum source containing approximately 1% Si and0.5% Cu.

In FIG. 2D, the first and second metal layers 260 and 270 have beenpatterned by, for instance, a photoresist mask 280 and plasma etch, inwhich the photoresist 280 masks the regions over metal contact patternareas 246 a, 246 b, and 246 c (see FIG. 2A) of dielectric layer 245.Thus, the portions of first metal layer 260 and second metal layer 270that were in between the photoresist mask 280 portions have beenremoved. In FIG. 2E the photoresist mask 280 has been stripped, leavingcontacts 275 a, 275 b and 275 c for the semiconductor device 200.Contacts 275 a, 275 b and 275 c include both the first metal 260 andsecond metal 270 that were used to form the contacts. Contacts 275 a and275 c are electrically connected to and serve as contacts for n-typelayer 230. Similarly, contact 275 b is electrically connected to andserves as a contact for p-type layer 234. Consequently, contacts 275 a,275 b and 275 c serve as external or device contacts for semiconductordevice 200. Thus, the first metal layer and the second metal layer formcontacts to both the n-type layer and the p-type layer. In someembodiments, the p-type layer includes a group III-nitride material, andthe n-type layer may also include a group III-nitride material. In FIG.2F a top passivation layer 290 is deposited and patterned usingtechniques known in the art, such that the passivation layer 290surrounds the perimeters of contacts 275 a, 275 b and 275 c.

By combining the contact and thick metal deposition steps ofconventional techniques into a sequential process of depositing firstand second metal layers, as in FIGS. 2A-2F, the number ofphotolithography steps required for device metallization is reduced fromfour to three. That is, to form the semiconductor device 200,photolithography is used to pattern the dielectric layer 245 (FIG. 2B),the first and second metal layers 260 and 270 using a single mask (FIG.2D), and the passivation layer 290 (FIG. 2F). The simplifiedmetallization process eliminates the metal-lift off step of conventionaltechniques (FIGS. 1A-1B), thereby avoiding potential issues with metalretention and re-deposition.

FIG. 3 is an exemplary flowchart 300 representing methods for formingcontacts as illustrated by FIGS. 2A-2F. A semiconductor structure isprovided in step 310, where the structure includes an n-type layer and ap-type layer. In some embodiments, the semiconductor structure may be anopto-electronic device structure with an n-type layer, a p-type layerand a light generating structure between the n-type layer and the p-typelayer. For example, the opto-electronic device may be a light emittingdiode (LED). In step 320, a dielectric layer is deposited on the n-typelayer and p-type layer. In step 330, a pattern is formed in thedielectric layer, where the pattern includes a plurality of metalcontact patterns for the semiconductor device. For example, in someembodiments the pattern includes a p-contact pattern and an n-contactpattern, such as for an opto-electronic device. In step 340, a firstmetal layer is deposited into the plurality of metal contact patterns,such as by depositing the first metal layer on the dielectric layer, then-contact pattern and p-contact pattern. The first metal may be, forexample, titanium. A second metal layer is deposited directly on thefirst metal layer in step 350, where the second metal may be, forexample, pure Al, AlCu, AlSi, or AlCuSi, of varying compositions asdescribed above in relation to FIG. 2C. The first metal layer and thesecond layer are deposited using sequential processing.

In step 360, device contacts are formed that include the second metallayer. The device contacts serve as external contacts for thesemiconductor device. In some embodiments, the device contacts arecreated by performing a masked etch removal of the first metal layer andsecond metal layer. The masked etch removal may include, for example,applying a pattern mask over the plurality of metal contact patterns,etching portions of the first metal layer and the second metal layerthat are exposed by the pattern mask, and removing the pattern mask. Insome embodiments, the masked etch removal includes using a pattern mask,the pattern mask being used to etch both the first metal layer and thesecond metal layer. In certain embodiments, the device contacts aredefined by the p-contact pattern and n-contact pattern of theopto-electronic device. In some embodiments, contact formation isfollowed by annealing at a temperature in the range of 300-1000° C. toimprove the contact mechanical and electrical properties.

A process sequence demonstrated by FIGS. 4A-4F shows how semiconductormetallization, such as for an LED, can be achieved using only twophotolithography steps, in further embodiments. In these embodiments, ablanket deposition is performed of what would be considered combinedcontact and thick metallization layers in conventional techniques. Themetallization layers are formed from the first and second metal layersin these embodiments. Following the metal layer depositions, wetchemical etching is employed to selectively remove metal in unwantedareas.

In FIG. 4A a semiconductor device 400 includes a substrate 410, a bufferlayer 420, an n-type layer 430, an intrinsic layer 432 and a p-typelayer 434. Semiconductor device 400 may be an opto-electronic device,such as an LED. Substrate 410 may be, for example, silicon, sapphire,silicon carbide or a group III-nitride such as aluminum nitride. In someembodiments, the p-type layer 434 includes a group III-nitride material,and the n-type layer 430 may also include a group III-nitride material.First metal layer 460 is deposited on the device structure, such as ontothe n-type layer 430 and p-type layer 434. Second metal layer 470 isthen deposited directly on first metal layer 460. Deposition of thefirst metal layer 460 and second metal layer 470 can be performedsequentially in a single process step. The metals for these layers maybe the same as described above in relation to FIGS. 2A-2F, such as thefirst metal layer 460 being titanium and the second metal layer 470being pure Al, or varying compositions of AlCu, AlSi, or AlCuSi. Thethicknesses of the metal layers 460 and 470 may also be the same aspreviously described, such as up to 100 nm for first metal layer 460 andat least 300 nm for second metal layer 470.

In FIG. 4B, patterning of the first metal layer 460 and the second metallayer 470 is performed by applying a photoresist 450. The photoresist450 shown in FIG. 4B has already been etched, such as by lithography, tocreate a pattern in which photoresist 450 remains only in the areaswhere contact metal material is desired to be preserved. In FIG. 4C thesecond metal layer 470 is etched first, where the etching removesportions of the second metal layer 470 that are exposed by photoresist450. For example, if the second metal layer is AlCuSi, removal may beachieved by a wet chemical etch using phosphoric acid (H₃PO₄) atapproximately 70-120° C. for up to 10 minutes. In FIG. 4D, portions ofthe first metal layer 460 (shown in FIG. 4C) are removed in areasexposed by photoresist 450. For example, if first metal layer 460 istitanium, a wet chemical etch using a hydrofluoric (HF) acid dip may beused at approximately 25° C. for up to 10 minutes. In some embodiments,the HF acid may be a 10:1 dilute solution, and the dip may have aduration of less than 1 minute. Etching of the first metal layer 460 inFIG. 4C results in device contacts 475 a, 475 b, and 475 c, in FIG. 4Dwhich are the patterned portions of both the first and second metallayers 460 and 470. Selective metal removal through wet chemical etchingis inherently a high throughput process due to the ability to process abatch of wafers in a chemical bath. Thus, the formation of metal contactpatterns by wet chemical etching, as shown in FIGS. 4C-4D, increasesmanufacturing rates. In further embodiments, additional processsimplification may be achieved by removal of the first metal layer andphotoresist stripping (FIGS. 4D and 4E) in a single wet chemical processstep. In further embodiments, the first metal layer and the second metallayer are removed using a plasma etch.

In FIG. 4E the photoresist 450 has been removed, or stripped, from thetop surfaces of device contacts 475 a, 475 b, and 475 c. In FIG. 4F atop passivation layer 490 is deposited and patterned, such that thepassivation layer 490 surrounds the perimeters of device contacts 475 a,475 b and 475 c.

FIG. 5 is an exemplary flowchart 500 representing methods for formingcontacts as illustrated by FIGS. 4A-4F. A semiconductor structure isprovided in step 510, where the structure comprises an n-type layer anda p-type layer. In some embodiments, the semiconductor structure may bean opto-electronic device structure with an n-type layer, a p-type layerand a light generating structure between the n-type layer and the p-typelayer. For example, the opto-electronic device may be a light emittingdiode (LED). In step 520, a first metal layer is deposited directly onthe opto-electronic device structure, such as on the n-type layer andthe p-type layer. The first metal may be, for example, titanium. Asecond metal layer is deposited directly on the first metal layer instep 530, where the second metal may be pure Al, AlCu, AlSi, or AlCuSi,of varying compositions as described in relation to FIG. 2C. The firstmetal layer and the second layer are deposited using sequentialprocessing.

In step 540, device contacts are created by performing a masked etchremoval of the first metal layer and second metal layer. A single maskis used for both the first metal layer and second metal layer, to formdevice contacts for the opto-electronic device. In some embodiments, themasked etch removal includes removing a first metal layer of titaniumusing hydrofluoric acid at approximately 25° C. for up to 10 minutes. Incertain embodiments, the HF acid may be a 10:1 dilute solution. In otherembodiments, the masked etch removal comprises removing a second metallayer of AlCuSi using H₃PO₄ at approximately 70-120° C. for up to 10minutes. Optionally, in step 550 the device may be further processed bydepositing a passivation layer directly onto the opto-electronic devicestructure and the device contacts, and patterning the passivation layerto expose the device contacts. The masked etch removal may include, forexample, applying a pattern mask over the plurality of metal contactpatterns, etching portions of the first metal layer and the second metallayer that are exposed by the pattern mask, and removing the patternmask. In some embodiments, the masked etch removal includes using apattern mask, the pattern mask being used to etch both the first metallayer and the second metal layer. In certain embodiments, the devicecontacts are defined by the p-contact pattern and n-contact pattern ofthe opto-electronic device. In some embodiments, contact formation isfollowed by annealing at a temperature in the range of 300-1000° C. toimprove the contact mechanical and electrical properties.

It is commonly believed that metals with different work functions shouldbe used for contacting the n and p regions of III-nitride materials.This view is based on the assumption that Schottky barrier heightsdepend on the work functions of the contact metals. Usually metals withwork functions less than that of n-GaN such as Ti, Al, Ta and V are usedfor contacting n-type material, whereas high work function metals suchas Ni, Au, Pd and Pt are used for contacts to p-type material. Thus,application of Ti/AlCuSi contacts for both n-type and p-type regions isa departure from conventional practice. The use of the same metal stackfor both the n- and p-contacts enables a more efficient metallizationscheme than conventional techniques in which separate processes arerequired to deposit different metals for the n- and p-contacts. An addedbenefit of Ti/AlCuSi contacts is avoidance of Au and device reliabilityproblems related to contacts containing Au.

While the specification has been described in detail with respect tospecific embodiments of the invention, it will be appreciated that thoseskilled in the art, upon attaining an understanding of the foregoing,may readily conceive of alterations to, variations of, and equivalentsto these embodiments. These and other modifications and variations tothe present invention may be practiced by those of ordinary skill in theart, without departing from the scope of the present invention.Furthermore, those of ordinary skill in the art will appreciate that theforegoing description is by way of example only, and is not intended tolimit the invention. Thus, it is intended that the present subjectmatter covers such modifications and variations.

What is claimed is:
 1. A method of forming contacts to an n-type layer and a p-type layer of a semiconductor opto-electronic device, comprising: providing an opto-electronic device structure with an n-type layer, a p-type layer and a light generating structure between the n-type layer and the p-type layer; depositing a first metal layer directly on the opto-electronic device structure; depositing a second metal layer directly onto the first metal layer; and performing a masked etch removal of the first metal layer and the second metal layer, using a single mask on both the first metal layer and the second metal layer to form device contacts for the opto-electronic device.
 2. The method of claim 1, further comprising: depositing a passivation layer directly onto the opto-electronic device structure and the device contacts; and patterning the passivation layer to expose the device contacts.
 3. The method of claim 1, wherein the first metal layer is titanium.
 4. The method of claim 3, wherein the masked etch removal comprises removing the first metal layer using hydrofluoric acid (HF) at approximately 25° C. for up to 10 minutes.
 5. The method of claim 4, wherein the hydrofluoric acid is a 10:1 dilute solution.
 6. The method of claim 1, wherein the second metal layer is AlCuSi.
 7. The method of claim 6, wherein the masked etch removal comprises removing the second metal layer using phosphoric acid (H₃PO₄) at approximately 70-120° C. for up to 10 minutes.
 8. The method of claim 1, wherein the masked etch removal comprises removing the first metal layer and the second metal layer using a plasma etch. 